The present invention relates generally to semiconductor packaging and, more particularly, to a lead frame based semiconductor package having a combined power and ground ring structure.
Certain semiconductor packages, such as quad flat (QFP) packages, quad flat no-lead (QFN) packages, and power QFN (PQFN) packages, include one or more integrated circuit (IC) dies and/or other active components physically attached to a lead frame and electrically connected to leads of the lead frame with a plurality of bond wires that span die pads on the die to respective leads of the lead frame. The IC dies, bond wires, and an interior portion of the lead frame are encapsulated by a mold compound, leaving a portion of the leads on the surface of the package exposed. These exposed leads serve as input and output (I/O) connections to the encapsulated IC dies and are typically located along a periphery of the package. QFPs have relatively short electrical paths and fast signal communication rates and are therefore widely used.
In some QFP packages, connections between bonding pads on the IC dies and a power source are made via one or more dedicated power bars, which serve as hubs, disposed within the QFP package. In such devices, a plurality of leads of the lead frame, referred to as dummy leads, are not only electrically coupled to the one or more power bars but also provide structural support to the one or more power bars. However, such use of package leads as dummy leads reduces the total number of package leads available for input/output (I/O) interconnection.
Accordingly, it would be advantageous to have a semiconductor device that can provide the advantages of dedicated power bars without using dummy leads.